Flip chip packaging of memory chips

The specification describes an interconnect strategy for memory chip packages to reduce or eliminate alpha particle contamination from the use of high lead solder interconnections in the vicinity of semiconductor memory cells. In the primary embodiment a high tin solder is recommended. A multi-layer...

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Bibliographische Detailangaben
Hauptverfasser: TAI, KING LIEN, DEGANI, YINON, DUDDERAR, THOMAS DIXON
Format: Patent
Sprache:eng ; fre ; ger
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Beschreibung
Zusammenfassung:The specification describes an interconnect strategy for memory chip packages to reduce or eliminate alpha particle contamination from the use of high lead solder interconnections in the vicinity of semiconductor memory cells. In the primary embodiment a high tin solder is recommended. A multi-layer under bump metallization is described that is compatible with high tin solders and flip-chip solder bump technology.