SERIES-PARALLEL/PARALLEL-SERIES DEVICE FOR VARIABLE BIT LENGTH CONFIGURATION

A serdes device includes circuitry for loading or reading bit configurations into or out of strings of latches of variable length nk+r, where n is the number of bits in a byte, k is the number of whole bytes and r is the number of residual bits, with r being smaller than n. Under the control of a se...

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Bibliographische Detailangaben
Hauptverfasser: DUFORESTEL, GUY GASTON, LECHACZYNSKI, MICHEL ANDRE, POIRAUD, CLEMENT YVON, VIALLON, PAUL PIERRE
Format: Patent
Sprache:eng ; fre
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