Method for GaN-HEMT and Si-CMOS monolithic integration
The invention discloses a method for GaN-HEMT and Si-CMOS monolithic integration. The steps are as follows: the surfaces of a Si-CMOS wafer and a temporary slide are washed, and temporary bonding is performed; thinning and polishing are performed on the Si-CMOS substrate; interconnected through hole...
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Format: | Patent |
Sprache: | chi ; eng |
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Zusammenfassung: | The invention discloses a method for GaN-HEMT and Si-CMOS monolithic integration. The steps are as follows: the surfaces of a Si-CMOS wafer and a temporary slide are washed, and temporary bonding is performed; thinning and polishing are performed on the Si-CMOS substrate; interconnected through holes are etched on the reverse side of the Si-CMOS; dielectric layers grow in the through holes and interconnected windows are etched; metal is electroplated and filled in the through holes and the reverse side of the Si-CMOS substrate; patterned metal bumps are prepared, patterned metal bumps are prepared on a GaN-HEMT wafer; alignment bonding is performed on the GaN-HEMT wafer and the Si-CMOS wafer; the temporary slide and a temporary bonding material are removed, thereby obtaining a GaN-HEMT andSi-CMOS monolithic integrated wafer. The method provided by the invention realizes high-density monolithic integration of the GaN-HEMIT and Si-CMOS, the order of magnitudes of interconnection densityis improved, and the prob |
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