Power-constrained Testing of VLSI Circuits

Minimization of power dissipation in very large scale integrated (VLSI) circuits is important to improve reliability and reduce packaging costs. While many techniques have investigated power minimization during the functional (normal) mode of operation, it is important to examine the power dissipati...

Ausführliche Beschreibung

Bibliographische Detailangaben

Hauptverfasser:	Nicolici, Nicola (VerfasserIn), Al-Hashimi, Bashir M. (VerfasserIn)
Format:	Elektronisch E-Book
Sprache:	English
Veröffentlicht:	Boston, MA Springer US 2003
Schriftenreihe:	Frontiers in Electronic Testing 22B
Schlagworte:	Engineering Circuits and Systems Electrical Engineering Computer-Aided Engineering (CAD, CAE) and Design Computer-aided engineering Electrical engineering Electronic circuits VLSI Prüftechnik
Online-Zugang:	FHI01 BTU01 URL des Erstveröffentlichers
Tags:	Tag hinzufügen Keine Tags, Fügen Sie den ersten Tag hinzu!