On minimizing the number of test points needed to achieve complete robust path delay fault testability
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| Hauptverfasser: | , , |
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| Format: | Buch |
| Sprache: | English |
| Veröffentlicht: |
Saarbrücken [u.a.]
Sonderforschungsbereich 124
1995
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| Schriftenreihe: | Sonderforschungsbereich VLSI-Entwurfsmethoden und Parallelität <Saarbrücken; Kaiserslautern>: SFB-Bericht
1995,8 |
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| 100 | 1 | |a Uppaluri, P. |e Verfasser |4 aut | |
| 245 | 1 | 0 | |a On minimizing the number of test points needed to achieve complete robust path delay fault testability |c P. Uppaluri ; U. Sparmann ; I. Pomeranz |
| 264 | 1 | |a Saarbrücken [u.a.] |b Sonderforschungsbereich 124 |c 1995 | |
| 300 | |a 18 Bl. |b graph. Darst. | ||
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| 490 | 1 | |a Sonderforschungsbereich VLSI-Entwurfsmethoden und Parallelität <Saarbrücken; Kaiserslautern>: SFB-Bericht |v 1995,8 | |
| 700 | 1 | |a Sparmann, U. |e Verfasser |4 aut | |
| 700 | 1 | |a Pomeranz, I. |e Verfasser |4 aut | |
| 830 | 0 | |a Sonderforschungsbereich VLSI-Entwurfsmethoden und Parallelität <Saarbrücken; Kaiserslautern>: SFB-Bericht |v 1995,8 |w (DE-604)BV006185478 |9 1995,8 | |
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Datensatz im Suchindex
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| author | Uppaluri, P. Sparmann, U. Pomeranz, I. |
| author_facet | Uppaluri, P. Sparmann, U. Pomeranz, I. |
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| author_sort | Uppaluri, P. |
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| bvnumber | BV011020581 |
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| id | DE-604.BV011020581 |
| illustrated | Illustrated |
| indexdate | 2024-12-23T14:19:52Z |
| institution | BVB |
| language | English |
| oai_aleph_id | oai:aleph.bib-bvb.de:BVB01-007377849 |
| oclc_num | 258534630 |
| open_access_boolean | |
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| owner_facet | DE-91 DE-BY-TUM |
| physical | 18 Bl. graph. Darst. |
| publishDate | 1995 |
| publishDateSearch | 1995 |
| publishDateSort | 1995 |
| publisher | Sonderforschungsbereich 124 |
| record_format | marc |
| series | Sonderforschungsbereich VLSI-Entwurfsmethoden und Parallelität <Saarbrücken; Kaiserslautern>: SFB-Bericht |
| series2 | Sonderforschungsbereich VLSI-Entwurfsmethoden und Parallelität <Saarbrücken; Kaiserslautern>: SFB-Bericht |
| spelling | Uppaluri, P. Verfasser aut On minimizing the number of test points needed to achieve complete robust path delay fault testability P. Uppaluri ; U. Sparmann ; I. Pomeranz Saarbrücken [u.a.] Sonderforschungsbereich 124 1995 18 Bl. graph. Darst. txt rdacontent n rdamedia nc rdacarrier Sonderforschungsbereich VLSI-Entwurfsmethoden und Parallelität <Saarbrücken; Kaiserslautern>: SFB-Bericht 1995,8 Sparmann, U. Verfasser aut Pomeranz, I. Verfasser aut Sonderforschungsbereich VLSI-Entwurfsmethoden und Parallelität <Saarbrücken; Kaiserslautern>: SFB-Bericht 1995,8 (DE-604)BV006185478 1995,8 |
| spellingShingle | Uppaluri, P. Sparmann, U. Pomeranz, I. On minimizing the number of test points needed to achieve complete robust path delay fault testability Sonderforschungsbereich VLSI-Entwurfsmethoden und Parallelität <Saarbrücken; Kaiserslautern>: SFB-Bericht |
| title | On minimizing the number of test points needed to achieve complete robust path delay fault testability |
| title_auth | On minimizing the number of test points needed to achieve complete robust path delay fault testability |
| title_exact_search | On minimizing the number of test points needed to achieve complete robust path delay fault testability |
| title_full | On minimizing the number of test points needed to achieve complete robust path delay fault testability P. Uppaluri ; U. Sparmann ; I. Pomeranz |
| title_fullStr | On minimizing the number of test points needed to achieve complete robust path delay fault testability P. Uppaluri ; U. Sparmann ; I. Pomeranz |
| title_full_unstemmed | On minimizing the number of test points needed to achieve complete robust path delay fault testability P. Uppaluri ; U. Sparmann ; I. Pomeranz |
| title_short | On minimizing the number of test points needed to achieve complete robust path delay fault testability |
| title_sort | on minimizing the number of test points needed to achieve complete robust path delay fault testability |
| volume_link | (DE-604)BV006185478 |
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