Wide-band high-accuracy ΔΣ ADC using segmented DAC with DWA and mismatch shaping

A discrete-time ΔΣ analogue-to-digital converter utilising a multi-bit successive approximation register quantiser and a segmented digital-to-analogue converter (DAC) is proposed. By adding the delayed DAC output to the modulator input and removing it at the modulator output in the digital domain, the mismatch error is filtered. Thus, a first-order DAC mismatch error shaping is realised. This improves the DAC linearity without introducing an extra delay in the feedback path. Segmenting the DAC and processing the least significant bit and most significant bit segments separately, the dynamic range remains unaffected.