A Three‐stage programmable impedance scaling circuit

Large capacitances are needed for low‐frequency active filters to process biomedical signals. The large capacitance can be implemented on a chip by an impedance scaling circuit. However, the characteristics of the circuit are affected by process variations. Then, we have proposed a digitally programmable impedance scaling circuit using electrical switches to compensate for the process variations. This paper describes a technique to reduce power consumption as compared with the conventional circuit. The proposed circuit is composed of a three‐stage current mirror circuit and electrical switches. To reduce the power consumption, the only signal current is amplified by current mirror circuits and bias current sources. The tuning range of the scaling factor of capacitance is from −35% to +28%, and the tuning accuracy is 1% using six switches. The validity of the proposed method is confirmed by simulations using HSPICE. The power consumption of the proposed circuit is reduced by 51% as compared with the conventional circuit. The proposed circuit is applied to a filter whose cutoff frequency is 100 Hz. From the tuning result, the tuning error is less than 1% for ±30% of ±3σ global variation and ± 3% of ±3σ local variation. © 2021 Institute of Electrical Engineers of Japan. Published by Wiley Periodicals LLC.