Verification
Chapter 8 describes methods to verify that specifications meet their goals and circuits are correct under all permissible delay behaviors. In order to validate a specification or circuit, simulation can be used, but this cannot guarantee complete coverage. Therefore, it is necessary to use verificat...
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| Format: | Buchkapitel |
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| Sprache: | eng |
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| Online-Zugang: | Volltext |
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| Zusammenfassung: | Chapter 8 describes methods to verify that specifications meet their goals and circuits are correct under all permissible delay behaviors. In order to validate a specification or circuit, simulation can be used, but this cannot guarantee complete coverage. Therefore, it is necessary to use verification to check if a specification or circuit operates correctly under all the allowed combinations of delay. |
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| DOI: | 10.1002/0471224146.ch8 |