Verify UML statecharts with SMV
TP311.5; Formal verification has been widely needed in the development ofsaf ety critical systems. In order to introduce the design verification activity in UML developing process, we have developed a verifier of UML Statecharts by using the model checker SMV. The approach is to transform a system m...
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Veröffentlicht in: | Wuhan University journal of natural sciences 2001-03, Vol.6 (1-2), p.183-190 |
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Hauptverfasser: | , , , |
Format: | Artikel |
Sprache: | eng |
Online-Zugang: | Volltext |
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Zusammenfassung: | TP311.5; Formal verification has been widely needed in the development ofsaf ety critical systems. In order to introduce the design verification activity in UML developing process, we have developed a verifier of UML Statecharts by using the model checker SMV. The approach is to transform a system model in UML State charts to one in SMV input language via an intermediate language and then to ver ify the system properties specified in CTL by invoking SMV. The current experien ces, including the formal verification of a simplified directory based cache coh erence protocol in UML Statecharts, show that automatic verification can be inte grated as a new step of the software process nicely. |
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ISSN: | 1007-1202 1993-4998 |
DOI: | 10.1007/BF03160241 |