Edims: an event-driven internal memory synchronized readout prototype ASIC chip developed for HFRS-TPC

HFRS (HIAF FRagment Separator) will be the radioactive secondary beam separation line on High-Intensity heavy-ion Accelerator Facility (HIAF) in China. Several TPC detectors, with high count rates, are planned for particle identification and beam monitoring at HFRS. This paper presents an event-driven internal memory and synchronous readout (EDIMS) prototype ASIC chip. The aim is to provide HFRS-TPC with high-precision time and charge measurements with high count rates and a large dynamic range. The first prototype EDIMS chip integrated 16 channels and is fabricated using a 0.18- μ m CMOS process. Each channel consists of a charge-sensitive amplifier, fast shaper, slow shaper, peak detect-and-hold circuit, discriminator with time-walk compensation, analog memory, and FIFO. The token ring is used for clock-synchronous readout. The chip is taped and tested.