Method for testing a memory device, as well as a control device having means for testing a memory

A method for testing a memory and a control device having means for a memory test. A destination address of the memory is selected in the process, dependent addresses of the memory are determined from the destination address, and user data at the destination address and the dependent addresses are backed up. Furthermore, the destination address and the dependent addresses are described by test patterns, via which a signature is formed. The backed-up user data of the destination address and the dependent addresses are then restored. Finally, the determined signature is compared with the known setpoint value. In the event of a deviation between the signature and the setpoint value, suitable protective mechanisms are initiated.