Skip based control logic for first in first out buffer

Skip based control logic for first in first out buffer

Skip based control logic for first in first out buffer is disclosed. In one embodiment, an isochronous data packet placed in an isochronous receive first in first out (IRFIFO) buffer coupled to an isochronous receive direct memory access (IRDMA) is detected. Further, a header of the isochronous data...

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Bibliographische Detailangaben
Hauptverfasser: Raikar, Rayesh Kashinath, Kommineni, Vijaya Bhaskar, Akula, Santosh Kumar, Kotikalapudi, Ranjith Kumar, Gangadhar, Vinay
Format: Patent
Sprache:eng
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Zusammenfassung:Skip based control logic for first in first out buffer is disclosed. In one embodiment, an isochronous data packet placed in an isochronous receive first in first out (IRFIFO) buffer coupled to an isochronous receive direct memory access (IRDMA) is detected. Further, a header of the isochronous data packet is read. Furthermore, a validity of the isochronous data packet is determined. Also, a read operation of remaining data of the isochronous data packet is skipped if the isochronous data packet is determined as invalid.