Method and system for optimal source impedance matching at the input of electronic components, particularly transistors

Method and system for optimal source impedance matching at the input of electronic components, particularly transistors

A method for determining optimal source impedance at the input of a device under testing (DUT) in a measurement bench, includes the steps of calibrating a source pull type bench as a measurement bench, adjusting a load impedance and continuous bias of the DUT, generating an electric power signal by...

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description A method for determining optimal source impedance at the input of a device under testing (DUT) in a measurement bench, includes the steps of calibrating a source pull type bench as a measurement bench, adjusting a load impedance and continuous bias of the DUT, generating an electric power signal by the source and injected in the DUT, acquiring input impedances of the DUT and corresponding gain performances.
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fullrecord <record><control><sourceid>uspatents_EFH</sourceid><recordid>TN_cdi_uspatents_grants_08269508</recordid><sourceformat>XML</sourceformat><sourcesystem>PC</sourcesystem><sourcerecordid>08269508</sourcerecordid><originalsourceid>FETCH-uspatents_grants_082695083</originalsourceid><addsrcrecordid>eNqNi0EKwjAQRbtxIeod5gAKRVHqWhQ37tzLkE7bQDITMhOktzeCB3D1Hvz3l837QTZJD8g96KxGEQbJIMl8xAAqJTsCHxP1yNUimps8j4AGNtWFUzGQASiQsyzsHTiJSZjYdAsJs3lXAuYwg2Vk9WqSdd0sBgxKmx9XDdyuz8t9VzShfb-vsdYVbbc_nY9td_gj-QBmpEfN</addsrcrecordid><sourcetype>Open Access Repository</sourcetype><iscdi>true</iscdi><recordtype>patent</recordtype></control><display><type>patent</type><title>Method and system for optimal source impedance matching at the input of electronic components, particularly transistors</title><source>USPTO Issued Patents</source><creator>Gasseling, Tony</creator><creatorcontrib>Gasseling, Tony ; AMCAD Engineering</creatorcontrib><description>A method for determining optimal source impedance at the input of a device under testing (DUT) in a measurement bench, includes the steps of calibrating a source pull type bench as a measurement bench, adjusting a load impedance and continuous bias of the DUT, generating an electric power signal by the source and injected in the DUT, acquiring input impedances of the DUT and corresponding gain performances.</description><language>eng</language><creationdate>2012</creationdate><oa>free_for_read</oa><woscitedreferencessubscribed>false</woscitedreferencessubscribed></display><links><openurl>$$Topenurl_article</openurl><openurlfulltext>$$Topenurlfull_article</openurlfulltext><thumbnail>$$Tsyndetics_thumb_exl</thumbnail><linktopdf>$$Uhttps://image-ppubs.uspto.gov/dirsearch-public/print/downloadPdf/8269508$$EPDF$$P50$$Guspatents$$Hfree_for_read</linktopdf><link.rule.ids>230,308,780,802,885,64038</link.rule.ids><linktorsrc>$$Uhttps://image-ppubs.uspto.gov/dirsearch-public/print/downloadPdf/8269508$$EView_record_in_USPTO$$FView_record_in_$$GUSPTO$$Hfree_for_read</linktorsrc></links><search><creatorcontrib>Gasseling, Tony</creatorcontrib><creatorcontrib>AMCAD Engineering</creatorcontrib><title>Method and system for optimal source impedance matching at the input of electronic components, particularly transistors</title><description>A method for determining optimal source impedance at the input of a device under testing (DUT) in a measurement bench, includes the steps of calibrating a source pull type bench as a measurement bench, adjusting a load impedance and continuous bias of the DUT, generating an electric power signal by the source and injected in the DUT, acquiring input impedances of the DUT and corresponding gain performances.</description><fulltext>true</fulltext><rsrctype>patent</rsrctype><creationdate>2012</creationdate><recordtype>patent</recordtype><sourceid>EFH</sourceid><recordid>eNqNi0EKwjAQRbtxIeod5gAKRVHqWhQ37tzLkE7bQDITMhOktzeCB3D1Hvz3l837QTZJD8g96KxGEQbJIMl8xAAqJTsCHxP1yNUimps8j4AGNtWFUzGQASiQsyzsHTiJSZjYdAsJs3lXAuYwg2Vk9WqSdd0sBgxKmx9XDdyuz8t9VzShfb-vsdYVbbc_nY9td_gj-QBmpEfN</recordid><startdate>20120918</startdate><enddate>20120918</enddate><creator>Gasseling, Tony</creator><scope>EFH</scope></search><sort><creationdate>20120918</creationdate><title>Method and system for optimal source impedance matching at the input of electronic components, particularly transistors</title><author>Gasseling, Tony</author></sort><facets><frbrtype>5</frbrtype><frbrgroupid>cdi_FETCH-uspatents_grants_082695083</frbrgroupid><rsrctype>patents</rsrctype><prefilter>patents</prefilter><language>eng</language><creationdate>2012</creationdate><toplevel>online_resources</toplevel><creatorcontrib>Gasseling, Tony</creatorcontrib><creatorcontrib>AMCAD Engineering</creatorcontrib><collection>USPTO Issued Patents</collection></facets><delivery><delcategory>Remote Search Resource</delcategory><fulltext>fulltext_linktorsrc</fulltext></delivery><addata><au>Gasseling, Tony</au><aucorp>AMCAD Engineering</aucorp><format>patent</format><genre>patent</genre><ristype>GEN</ristype><title>Method and system for optimal source impedance matching at the input of electronic components, particularly transistors</title><date>2012-09-18</date><risdate>2012</risdate><abstract>A method for determining optimal source impedance at the input of a device under testing (DUT) in a measurement bench, includes the steps of calibrating a source pull type bench as a measurement bench, adjusting a load impedance and continuous bias of the DUT, generating an electric power signal by the source and injected in the DUT, acquiring input impedances of the DUT and corresponding gain performances.</abstract><oa>free_for_read</oa></addata></record>
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title Method and system for optimal source impedance matching at the input of electronic components, particularly transistors
url https://sfx.bib-bvb.de/sfx_tum?ctx_ver=Z39.88-2004&ctx_enc=info:ofi/enc:UTF-8&ctx_tim=2025-01-12T13%3A54%3A32IST&url_ver=Z39.88-2004&url_ctx_fmt=infofi/fmt:kev:mtx:ctx&rfr_id=info:sid/primo.exlibrisgroup.com:primo3-Article-uspatents_EFH&rft_val_fmt=info:ofi/fmt:kev:mtx:patent&rft.genre=patent&rft.au=Gasseling,%20Tony&rft.aucorp=AMCAD%20Engineering&rft.date=2012-09-18&rft_id=info:doi/&rft_dat=%3Cuspatents_EFH%3E08269508%3C/uspatents_EFH%3E%3Curl%3E%3C/url%3E&disable_directlink=true&sfx.directlink=off&sfx.report_link=0&rft_id=info:oai/&rft_id=info:pmid/&rfr_iscdi=true