Method and system for optimal source impedance matching at the input of electronic components, particularly transistors

A method for determining optimal source impedance at the input of a device under testing (DUT) in a measurement bench, includes the steps of calibrating a source pull type bench as a measurement bench, adjusting a load impedance and continuous bias of the DUT, generating an electric power signal by the source and injected in the DUT, acquiring input impedances of the DUT and corresponding gain performances.