Nonvolatile semiconductor memory

A nonvolatile semiconductor memory comprises a memory cell array in which a plurality of memory cell transistors capable of storing data according to a threshold voltage; a row decoder having a plurality of transfer MOS transistors connected at first ends to a plurality of word lines which are respectively connected to control gate electrodes of the plurality of memory cell transistors; and a word line driver which selects supplied voltages and supplies the selected voltages to second ends of the plurality of transfer MOS transistors. The nonvolatile semiconductor memory further comprises a voltage generation circuit which supplies voltages to the word line driver; and a control circuit which controls operation of the row decoder, the word line driver and the voltage generation circuit.