System and method for providing compliant mapping between chip bond locations and package bond locations for an integrated circuit
A system and method for providing compliant mapping between chip bond locations of an IC and corresponding package bond locations is disclosed. Package design information including package bond location information relating to the IC package and IC mask data including chip bond location information...
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| Hauptverfasser: | , |
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| Format: | Patent |
| Sprache: | eng |
| Online-Zugang: | Volltext bestellen |
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| Zusammenfassung: | A system and method for providing compliant mapping between chip bond locations of an IC and corresponding package bond locations is disclosed. Package design information including package bond location information relating to the IC package and IC mask data including chip bond location information relating to the IC chip are integrated such that an internal physical design verification tool is operable to verify compliance between package bond locations and chip bond locations. |
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