Method of manufacturing an integrated circuit

An integrated circuit is provided that comprises a substrate of silicon and an interconnect in a through-hole extending from the first to the second side of the substrate. The interconnect is coupled to a metallization layer on the first side of the substrate and is provided on an amorphous silicon layer that is present at a side wall of the through-hole, and particularly at an edge thereof adjacent to the first side of the substrate. The interconnect comprises a metal stack of nickel and silver. A preferred way of forming the amorphous silicon layer is a sputter etching technique.