Method and apparatus for dynamically aligning high-speed signals in an integrated circuit
A method and apparatus for dynamically aligning high-speed signals in an integrated circuit are disclosed. For example, an integrated circuit according to one embodiment includes a logic fabric and at least one input/output interface coupled to the logic fabric. The input/output interface includes a...
Gespeichert in:
1. Verfasser: | |
---|---|
Format: | Patent |
Sprache: | eng |
Online-Zugang: | Volltext bestellen |
Tags: |
Tag hinzufügen
Keine Tags, Fügen Sie den ersten Tag hinzu!
|
Zusammenfassung: | A method and apparatus for dynamically aligning high-speed signals in an integrated circuit are disclosed. For example, an integrated circuit according to one embodiment includes a logic fabric and at least one input/output interface coupled to the logic fabric. The input/output interface includes a plurality of input/output sites and an edge detector coupled to the plurality of input/output sites for detecting an edge in an input signal received by the integrated circuit. A plurality of delay lines are used to determine whether the input signal arrives too early or too late compared to a clock signal in the integrated circuit, and delays in the delay lines are adjusted to align the input signal with the clock signal in the integrated circuit. |
---|