Verifying non-deterministic behavior of a design under test

The invention generally relates to design verification, and more particularly to verification of non-deterministic behavior of a design under test. A method includes predicting a plurality of behaviors of a design under test (DUT), and forking respective verification tasks for each one of the plural...

Ausführliche Beschreibung

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Bibliographische Detailangaben
Hauptverfasser: Craig, Jesse E, Granato, Suzanne, Kampf, Francis A, Powers, Barbara L
Format: Patent
Sprache:eng
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Beschreibung
Zusammenfassung:The invention generally relates to design verification, and more particularly to verification of non-deterministic behavior of a design under test. A method includes predicting a plurality of behaviors of a design under test (DUT), and forking respective verification tasks for each one of the plurality of behaviors. The method further includes verifying an actual behavior of the DUT with each of the verification tasks, and terminating a respective one of the verification tasks when the actual behavior of the DUT does not conform to the respective one of the verification tasks.