Semiconductor device

Plural I/O cells having electrode pads for wire bonding are disposed with spaces between them in the vicinity of a corner of an I/O region of a semiconductor substrate, and power supply separation cells not to be wire bonded, on which ESD (electrostatic discharge) protection circuits having ESD prot...

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Bibliographische Detailangaben
Hauptverfasser: Segawa, Hiroaki, Hirofuji, Masanori
Format: Patent
Sprache:eng
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Beschreibung
Zusammenfassung:Plural I/O cells having electrode pads for wire bonding are disposed with spaces between them in the vicinity of a corner of an I/O region of a semiconductor substrate, and power supply separation cells not to be wire bonded, on which ESD (electrostatic discharge) protection circuits having ESD protection transistors are amounted, are disposed between the respective I/O cells, whereby the chip size is reduced upon consideration of layout of the electrode pads.