Accurate hysteretic comparator and method

hystnx inhysinNF NF inhysNFNF tnx A hysteretic comparator is proposed for comparing input signals and producing an output signal VOT with a hysteresis window V. The hysteretic comparator includes a differential input stage with current output (DICO) having input transistors with transconductance Gmfor converting the input signals, with an input stage transconductance Gm, into intermediate signal currents. A steerable offset current generator, driven by a steering control signal, steers an offset current source IOS to alternative offset currents. A current-to-voltage summing converter (IVSC) sums up the intermediate signal currents and the offset currents and converts the result into VOT plus the steering control signal causing V=IOS/Gm. A feedback resistance Ris connected to the input transistors to form a negative feedback loop. The Ris sized such that GM, hence V, becomes essentially solely dependent upon the feedback conductance G=1/Rindependent of the Gmthus its process and environmental variation.