Thermal conduction by encapsulation

A packaged electronic device includes a substrate with an upper surface interrupted by a well formed in the substrate. The well has a substrate bottom surface and a substrate sidewall. An electronic device is located in the well over the substrate bottom surface and has a device top surface and a device sidewall. A trench is bounded by the substrate bottom surface, the substrate sidewall and the device sidewall. An encapsulant at least partially fills the trench and contacts the substrate sidewall and the device sidewall. The encapsulant has a first elevation on the substrate sidewall with respect to the substrate bottom surface and a second elevation on the substrate device sidewall with respect to the substrate bottom surface that is at least about 35% greater than the first elevation.