Semiconductor chips having improved electrostatic discharge protection circuit arrangement

A semiconductor chip may include a plurality of pads arranged in at least a first and a second row, and a plurality of protection circuits connected to the plurality of pads. The plurality of protection circuits may include at least one diode. A first protection circuit may be connected to a first p...

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Bibliographische Detailangaben
Hauptverfasser: Lee, Ki-Tae, Kim, Han-Gu, Ko, Jae-Hyok
Format: Patent
Sprache:eng
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Zusammenfassung:A semiconductor chip may include a plurality of pads arranged in at least a first and a second row, and a plurality of protection circuits connected to the plurality of pads. The plurality of protection circuits may include at least one diode. A first protection circuit may be connected to a first pad in the first row of pads, and a second protection circuit may be connected to a second pad in the second row of pads. The first and second protection circuits may be arranged under the first row of pads.