Integrated circuit selective scaling

The invention includes a solution for selectively scaling an integrated circuit (IC) design by: layer, region or cell, or a combination of these. The selective scaling technique can be applied in a feedback loop with the manufacturing system with process and yield feedback, during the life of a desi...

Ausführliche Beschreibung

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Bibliographische Detailangaben
Hauptverfasser: Heng, Fook-Luen, Hibbeler, Jason D, McCullen, Kevin W, Narayan, Rani R, Runyon, Stephen L, Walker, Robert F
Format: Patent
Sprache:eng
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Beschreibung
Zusammenfassung:The invention includes a solution for selectively scaling an integrated circuit (IC) design by: layer, region or cell, or a combination of these. The selective scaling technique can be applied in a feedback loop with the manufacturing system with process and yield feedback, during the life of a design, to increase yield in early processes in such a way that hierarchy is preserved. The invention removes the need to involve designers in improving yield.