Phase shifting and combining architecture for phased arrays

Improved phased array techniques and architectures are provided. For example, a linear phased array includes N discrete phase shifters and N−1 variable phase shifters, wherein the N−1 variable phase shifters are respectively coupled between adjacent output nodes of the N discrete phase shifters such that the N discrete phase shifters reduce an amount of continuous phase shift provided by the N−1 variable phase shifters. Each of the N discrete phase shifters may select between two or more discrete phase shifts. The N discrete phase shifters also preferably eliminate a need for a variable termination impedance in the linear phased array.