Bit-edge zero forcing equalizer

Bit-Edge Zero Forcing Equalizer. A novel solution is presented by which a BE-ZFE (Bit-Edge Zero Forcing Equalizer) is employed to drive an error term within a data signal to an essentially zero value. This new BE-ZFE looks at values of data that occur at the bit edges of a data signal and drives the...

Ausführliche Beschreibung

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Bibliographische Detailangaben
Hauptverfasser: Brunn, Brian T, Anderson, Stephen D
Format: Patent
Sprache:eng
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Beschreibung
Zusammenfassung:Bit-Edge Zero Forcing Equalizer. A novel solution is presented by which a BE-ZFE (Bit-Edge Zero Forcing Equalizer) is employed to drive an error term within a data signal to an essentially zero value. This new BE-ZFE looks at values of data that occur at the bit edges of a data signal and drives the associated error term to zero. The new BE-ZFE is appropriately implemented within communication systems that are phase (or jitter) noise limited. Some examples of such communication systems include high-speed serial links one type of which serviced using a SERDES (Serializer/De-serializer) where data that is originally in a parallel format is serialized into a serial data stream and then subsequently de-serialized back into a parallel data stream.