Performance simulation of multiprocessor systems

An embodiment of the present invention is a technique to simulate performance of a multi-core system. A micro-architecture effect is estimated from each core in the multi-core system. A model of a memory hierarchy associated with each core is simulated. The simulated model of the memory hierarchy is...

Ausführliche Beschreibung

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Bibliographische Detailangaben
Hauptverfasser: Gabor, Ron, Leibowitz, Nathaniel, Tsadik, Meir, Kulbak, Yoram
Format: Patent
Sprache:eng
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Beschreibung
Zusammenfassung:An embodiment of the present invention is a technique to simulate performance of a multi-core system. A micro-architecture effect is estimated from each core in the multi-core system. A model of a memory hierarchy associated with each core is simulated. The simulated model of the memory hierarchy is superpositioned on the estimated micro-architecture effect to produce a performance figure for the multi-core system.