A/D converter

A full-flash A/D converter, including a differential amplifier circuit row and a voltage comparison circuit row, has an adjusting circuit for making the output dynamic range of differential amplifier circuits accurately fall within the input dynamic range of voltage comparison circuits. The adjusting circuit includes a reference voltage generation circuit which has therein voltage generation circuits whose resistors are connected in series. By this series connection, the area of the voltage generation circuits is reduced, while the output dynamic range of the differential amplifier circuits A to Am+1 in the differential amplifier circuit row accurately falls within the input dynamic range of the voltage comparison circuits Cr to Crm+1 in the voltage comparison circuit row Furthermore, half-circuits in the voltage generation circuits are used to generate reference voltages, whereby the area of the voltage generation circuits is reduced further.