Capacitor multipler circuits and the applications thereof to attenuate row-wise temporal noise in image sensors

The various embodiments disclose capacitor multiplier circuits that may be integrated into imaging devices, such as for semiconductor Complimentary Metal Oxide Semiconductor (CMOS) image sensors, to create an effective capacitance in response to a low frequency, such as row-wise temporal noise, that...

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Bibliographische Detailangaben
1. Verfasser: Zadeh, Ali E
Format: Patent
Sprache:eng
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Zusammenfassung:The various embodiments disclose capacitor multiplier circuits that may be integrated into imaging devices, such as for semiconductor Complimentary Metal Oxide Semiconductor (CMOS) image sensors, to create an effective capacitance in response to a low frequency, such as row-wise temporal noise, that may be generated along a row of image sensor pixels. The created effective capacitance from any one of the capacitor multiplier circuits along with a small signal resistance created by a trans-conductance of a current biasing transistor form a low pass filter that will attenuate the low frequency noise.