Efficient flushing of translation lookaside buffers in a multiprocessor environment

Various operations are disclosed for improving the operational efficiency of address mapping caches, such as translation lookaside buffers, in a multiprocessor environment. When an address mapping translation is invalidated, unnecessary address mapping cache flushes are avoided by signaling only tho...

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1. Verfasser: Ganguly, Shuvabrata
Format: Patent
Sprache:eng
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Zusammenfassung:Various operations are disclosed for improving the operational efficiency of address mapping caches, such as translation lookaside buffers, in a multiprocessor environment. When an address mapping translation is invalidated, unnecessary address mapping cache flushes are avoided by signaling only those processors operating in a virtual machine monitor mode to flush their address mapping caches. Address mapping cache flushes for processors operating in guest modes are postponed until the processor enters a virtual machine monitor mode. Optionally, a counter is maintained for each processor and incremented each time the processor enters virtual machine monitor mode. When an address mapping cache is invalidated, a snapshot of the counter values is stored. When an new address translation for an invalidated address translation is requested, the snapshot is compared with the current value of a counter to determine whether the address mapping cache associated with the counter has been flushed since the invalidation.