Semiconductor device and method for manufacturing thereof

In a power semiconductor device, a joint between the power semiconductor element and frame plated with Ni is composed of a laminated structure comprising, from the power semiconductor element side, an intermetallic compound layer having a melting point of 260° C. or higher, a Cu layer, a metal layer...

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Bibliographische Detailangaben
Hauptverfasser: Ikeda, Osamu, Okamoto, Masahide, Kagii, Hidemasa, Oka, Hiroi, Nakamura, Hiroyuki
Format: Patent
Sprache:eng
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Beschreibung
Zusammenfassung:In a power semiconductor device, a joint between the power semiconductor element and frame plated with Ni is composed of a laminated structure comprising, from the power semiconductor element side, an intermetallic compound layer having a melting point of 260° C. or higher, a Cu layer, a metal layer having a melting point of 260° C. or higher, a Cu layer and an intermetallic layer having a melting point of 260° C. or higher. The structure of the joint buffers the stress generated by the secondary mounting and temperature cycle at the bond for the semiconductor element and the frame having a large difference in thermal expansion coefficient from each other.