Systems and methods for mitigating latency associated with error detection and correction
Systems and methods for mitigating latency associated with error detection and correction of a data structure are disclosed. One embodiment of a system may comprise a packet generator that builds a response packet associated with a request for a data structure based on a tag portion of the data stru...
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| Hauptverfasser: | , , |
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| Format: | Patent |
| Sprache: | eng |
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| Zusammenfassung: | Systems and methods for mitigating latency associated with error detection and correction of a data structure are disclosed. One embodiment of a system may comprise a packet generator that builds a response packet associated with a request for a data structure based on a tag portion of the data structure. The system may also comprise an error detection and correction (EDC) component that detects and corrects errors in the data structure concurrently with the building of the response packet by the packet generator. |
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