Device having reduced chemical mechanical planarization

The present technique is directed toward the fabrication of integrated circuits and provides for the production of a hardened metal layer on the surface of a semiconductor wafer to reduce the amount of material removed during chemical mechanical planarization (CMP) of the metal layer. This hardened...

Ausführliche Beschreibung

Bibliographische Detailangaben

1. Verfasser:	Ramarajan, Suresh
Format:	Patent
Sprache:	eng
Online-Zugang:	Volltext bestellen
Tags:	Tag hinzufügen Keine Tags, Fügen Sie den ersten Tag hinzu!