Computer architecture containing processor and decoupled coprocessor

A computer system comprises a first processor and a second processor for use as a coprocessor to the first processor . The system has a main memory . The system also has a decoupling element such that instructions are passed to the second processor from the first processor through the decoupling element . This has the effects that the second processor consumes instructions derived from the first processor through the decoupling element , and that the second processor receives data from and writes data to the memory . The processing of instructions by the second processor can thus be decoupled from the operation of the first processor This is particularly effective for processing of a computationally intensive task (such as a media computation) on an architecture with a general purpose first processor , using a second processor adapted for the computationally intensive task. This can effectively be combined with use of a buffer memory adapted to exchange data particularly rapidly with the memory in response to memory instructions, together with a further decoupling element to decouple the buffer memory from the first processor