Computer-supported, automated method for the verification of analog circuits
The invention relates to a computer-supported, automated method for the verification of analog circuits, and to a storage medium on which a computer software program is stored for performing such method, including transforming of constants or variables characterizing a first equation system for desc...
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| Format: | Patent |
| Sprache: | eng |
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| Zusammenfassung: | The invention relates to a computer-supported, automated method for the verification of analog circuits, and to a storage medium on which a computer software program is stored for performing such method, including transforming of constants or variables characterizing a first equation system for describing the properties of a circuit; transforming of constants or variables characterizing a second equation system for describing the properties of a circuit; and performing a circuit equivalence test by using the transformed quantities obtained from transforming. |
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