Method of fabricating dual damascene interconnections of microelectronic device using diffusion barrier layer against base material

3/23/2Methods of fabricating dual damascene interconnections suitable for use in microelectronic devices and similar applications using a diffusion barrier layer to protect against base materials during processing are provided. The methods include the steps of: filling a via with a hydrogen silsesqu...

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Bibliographische Detailangaben
Hauptverfasser: Lee, Kyoung-woo, Maeng, Jae-yeol, Kim, Jae-hak, Oh, Il-whan, Shin, Hong-jae
Format: Patent
Sprache:eng
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Zusammenfassung:3/23/2Methods of fabricating dual damascene interconnections suitable for use in microelectronic devices and similar applications using a diffusion barrier layer to protect against base materials during processing are provided. The methods include the steps of: filling a via with a hydrogen silsesquioxane (HSQ)-based filler as expressed by the general chemical formula: (RSiO)x(HSiO)y, wherein x and y satisfy the relationships x+y=1 and 0