Simulated module load

A circuit and method of operation for simulating a capacitive load for an integrated circuit or chip. The circuit adds a small capacitor to a test cell that tests the performance of a chip, such as a DRAM memory device, so that it may be tested realistically before being soldered into a final assemb...

Ausführliche Beschreibung

Bibliographische Detailangaben

Hauptverfasser:	Buheis, Omar H, Mitra, Robin K
Format:	Patent
Sprache:	eng
Online-Zugang:	Volltext bestellen
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