Simulated module load

A circuit and method of operation for simulating a capacitive load for an integrated circuit or chip. The circuit adds a small capacitor to a test cell that tests the performance of a chip, such as a DRAM memory device, so that it may be tested realistically before being soldered into a final assemb...

Ausführliche Beschreibung

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Bibliographische Detailangaben
Hauptverfasser: Buheis, Omar H, Mitra, Robin K
Format: Patent
Sprache:eng
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Beschreibung
Zusammenfassung:A circuit and method of operation for simulating a capacitive load for an integrated circuit or chip. The circuit adds a small capacitor to a test cell that tests the performance of a chip, such as a DRAM memory device, so that it may be tested realistically before being soldered into a final assembly, such as a DRAM module. Other passive devices, such as inductors or resistors may also be used in place of or in addition to a capacitor. By providing increased capacitance, or inductance or resistance for the test sequence, each circuit is tested under more realistic conditions. In one example, DRAM memory device modules may be realistically tested for performance by using sockets with small capacitors hard wired between pins of the DRAM device and a test interface used to perform the tests.