Multi-threshold MOS circuits

A multi-threshold flip-flop includes a master latch, a slave latch, and at least one control switch. The master latch is composed of an input buffer formed with low threshold (LVT) transistors and a first latch circuit formed with LVT transistors. The slave latch is composed of a second latch circuit formed with high threshold (HVT) transistors and an output driver formed with LVT transistors. The at least one control switch enables or disables the LVT transistors and is implemented with at least one HVT transistor. The LVT and HVT transistors may be N-FETs and/or P-FETs. The multi-threshold flip-flop can operate at high speed, has low leakage current, and can save the logic state when disabled.