Titanium underlayer for lines in semiconductor devices
A thin Titanium underlayer is included beneath a Titanium rich Titanium Nitride layer in a metal line on a silicon substrate to reduce stress voiding.
Gespeichert in:
| Hauptverfasser: | , , |
|---|---|
| Format: | Patent |
| Sprache: | eng |
| Online-Zugang: | Volltext bestellen |
| Tags: |
Tag hinzufügen
Keine Tags, Fügen Sie den ersten Tag hinzu!
|
| Zusammenfassung: | A thin Titanium underlayer is included beneath a Titanium rich Titanium Nitride layer in a metal line on a silicon substrate to reduce stress voiding. |
|---|