SOI single crystalline chip structure with multi-thickness silicon layer

A SOI (silicon on insulator) single crystalline chip structure is provided. The SOI chip structure has a first silicon layer for at least one SOI device to be placed thereon, at least one buried oxide area with a predetermined depth placed at a predetermined position of the first silicon layer in order to enable the first silicon layer to have at least two different silicon layer thicknesses. The buried oxide area is filled with a silicon oxide material serving as an insulating area, and a second silicon layer is located below the first silicon layer and the buried oxide area.