In-process semiconductor packages with leadframe grid arrays

Methods of forming a semiconductor assembly are described which include a leadframe with leads having offset portions exposed at an outer surface of a material package to form a grid array. An electrically conductive compound, such as solder, may be disposed or formed on the exposed lead portions to...

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Bibliographische Detailangaben
Hauptverfasser: Yu, Chan Min, Leng, Ser Bok, Waf, Low Siu, Poo, Chia Yong, Koon, Eng Meow
Format: Patent
Sprache:eng
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Beschreibung
Zusammenfassung:Methods of forming a semiconductor assembly are described which include a leadframe with leads having offset portions exposed at an outer surface of a material package to form a grid array. An electrically conductive compound, such as solder, may be disposed or formed on the exposed lead portions to form a grid array such as a ball grid array ("BGA") or other similar array-type structure of dielectric conductive elements. The leads may have inner bond ends including a contact pad thermocompressively bonded to a bond pad of the semiconductor chip to enable electrical communication therewith and a lead section with increased flexibility to improve the thermocompressive bond. The inner bond ends may also be wirebonded to the bond pads.