Method for manufacturing trench gate semiconductor device

ceaeeeceecabA device termination structure, and/or a gate bus-bar structure, and/or other end structure is provided for at least one group of cells in a cellular trench-gate semiconductor device, for example a power MOSFET. In this end structure, a conductive layer, for example of polysilicon gate m...

Ausführliche Beschreibung

Gespeichert in:
Bibliographische Detailangaben
Hauptverfasser: Peake, Steven T, Petkos, Georgios, Rutter, Philip, Grover, Raymond J
Format: Patent
Sprache:eng
Online-Zugang:Volltext bestellen
Tags: Tag hinzufügen
Keine Tags, Fügen Sie den ersten Tag hinzu!
Beschreibung
Zusammenfassung:ceaeeeceecabA device termination structure, and/or a gate bus-bar structure, and/or other end structure is provided for at least one group of cells in a cellular trench-gate semiconductor device, for example a power MOSFET. In this end structure, a conductive layer, for example of polysilicon gate material, extends on an intermediate insulating layer over a higher-doped (P+) end region of the channel-accommodating region. This insulating layer comprises an area of a trench-etch mask, preferably comprising silicon nitride, that is of greater thickness than the gate dielectric layer. A window extends through the trench-etch mask at a location where an end trench extends into the P+ region. The end trench is an extension of the insulated gate trench into the P+ region and accommodates an extension of the trench-gate. The conductive layer is connected to the trench-gate extension via the window. The lateral extent of the conductive layer terminates in an edge that is defined on the trench-etch mask.