Apparatus and method for accurately tuning the speed of an integrated circuit

An apparatus and method for accurately tuning the speed of an integrated circuit, i.e. a computer chip, using a built-in sense circuit and controller are provided. The sense circuit is provided in association with a monitored path. The sense circuit includes a variable delay element coupled to a controller. A data signal from the monitored path is provided to the sense circuit which adds an amount of delay as determined by the controller to the data signal. The delayed data signal and the original data signal are compared to determine if their values match. If they match, then the amount of delay added by the variable delay element is increased. If they do not match, then a previous amount of delay, prior to the mismatch, is output as the slack of the monitored path. The slack may then be used to tune the speed of the integrated circuit.