Controller area network transceiver having capacitive balancing circuit for improved receiver common-mode rejection
A controller area network transceiver and a transmission method for a controller area network provides improved symmetry between its differential output signal CANH and CANL such that capacitive imbalance is minimized. The transceiver disclosed herein includes a driver including a non-inverted outpu...
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Sprache: | eng |
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Zusammenfassung: | A controller area network transceiver and a transmission method for a controller area network provides improved symmetry between its differential output signal CANH and CANL such that capacitive imbalance is minimized. The transceiver disclosed herein includes a driver including a non-inverted output that couples to the first output terminal CANH and a inverted output that couples to the second output terminal CANL. A receiver comparator includes a non-inverted input coupled to the first output terminal CANH and a inverted input coupled to the second output terminal CANL. A first and second impedance matching circuit portions capacitively balance the first and second output terminals such that efficient common-mode rejection is enabled by setting the RC time constants formed by each impedance matching circuit and external resistances to be substantially equivalent. This transceiver provides a high performance, simple, and cost effective design which eliminates capacitive imbalance while decreasing required die area. |
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