Low power PLL for PWM switching digital control power supply

A timing source for a pulse generator is disclosed, which timing source includes an input for receiving a reference clock output at a reference operating frequency. An edge generator is provided for generating a plurality of clock edges from an edge of the reference clock during one period thereof, with the spacing of the plurality of clock edges being a multiple of a predetermined divisor. As such, the resolution of such spacing emulates a higher clock frequency than the reference operating frequency. A selector then selects one of the plurality of clock edges from a reference one thereof to define the width of a pulse.