Method for integrating high-k dielectrics in transistor devices

Methods are disclosed that fabricating semiconductor devices with high-k dielectric layers. The invention removes portions of deposited high-k dielectric layers not below gates and covers exposed portions (e.g., sidewalls) of high-k dielectric layers during fabrication with an encapsulation layer, w...

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Bibliographische Detailangaben
Hauptverfasser: Rotondaro, Antonio L. P, Mercer, Douglas E, Colombo, Luigi, Visokay, Mark Robert, Bu, Haowen, Bevan, Malcolm John
Format: Patent
Sprache:eng
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Beschreibung
Zusammenfassung:Methods are disclosed that fabricating semiconductor devices with high-k dielectric layers. The invention removes portions of deposited high-k dielectric layers not below gates and covers exposed portions (e.g., sidewalls) of high-k dielectric layers during fabrication with an encapsulation layer, which mitigates defects in the high-k dielectric layers and contamination of process tools. The encapsulation layer can also be employed as an etch stop layer and, at least partially, in comprising sidewall spacers. As a result, a semiconductor device can be fabricated with a substantially uniform equivalent oxide thickness.