MRAM storage device

A memory device having a main controller including a host interface and a device interface, a first plurality of arrays of magneto-resistive random access memory (MRAM) cells, a first device controller coupled to the device interface and the first plurality of arrays, a second plurality of arrays of MRAM cells, and a second device controller coupled to the device interface and the second plurality of arrays. The first device controller is configured to communicate with the device interface to pass first data between the first plurality of arrays and the host interface, and wherein the second device controller is configured to communicate with the device interface to pass second data between the second plurality of arrays and the host interface.