Architecture for high throughput semiconductor processing applications

A semiconductor wafer processing system in accordance with an embodiment of the present invention includes a loading station, a load lock, a process module, an intermediate process module, and a transport module which further includes a load chamber, a transfer chamber, and a pass-through chamber between the load chamber and the transfer chamber. The intermediate process module may be coupled to the load chamber, or both the load chamber and the transfer chamber. In one embodiment, the load lock is a single-wafer load lock capable of accommodating only a single wafer at a time to allow for fast pump down and vent cycles. In one embodiment, the pass-through chamber is configured as a cooling station to improve throughput for processes that require the wafer to be cooled in-between depositions, for example.