Semiconductor memory device having potential amplitude of global bit line pair restricted to partial swing

A local sense amplifier drives a global bit line pair by potentials of data storage nodes when a global word line attains an H level. A global sense amplifier amplifies the potential difference of data storage nodes when a global sense enable signal attains an H level. The global sense enable signal is inverted by an inverter to be provided to a global word driver. When the global word line attains an L level by the global word driver, the local sense amplifier suppresses the drive of the global bit line pair.